FIG. 1 illustrates a traditional clock and data recovery system. To generate a signal CLK having a phase and frequency which matches the phase and data rate of DATA, a serial non-return-to-zero (NRZ) data stream, a traditional clock and data recovery system combines in a closed-loop system data phase detector 11, charge pump 12, loop filter 13, and voltage-controlled oscillator (VCO) 14. Within the NRZ data stream, successive “1” logic levels and “0” logic levels are transmitted sequentially, with each logic level held for a period of time called a bit-time. In this system, the data phase detector determines if the falling edge of CLK leads or lags transitions in the NRZ data stream. Data phase detector output signal UP is asserted for one bit-time if the falling edge of CLK lags a data transition; DOWN is asserted for one bit-time if the falling edge of CLK leads a data transition. The UP and DOWN signals are converted to a current by the charge pump and this current is filtered by the loop filter. The filter outputs a voltage which controls the phase and frequency of the VCO. Negative feedback ensures that the feedback loop's steady-state operating point is such that the falling edge of CLK is in phase alignment with transitions in the NRZ data stream, and this ensures that the rising edge of CLK samples the center of each bit-time. The loop filter provides for the addition of a zero in the system's open-loop transfer function, facilitating stability. Additional circuits and methods are used in some embodiments to help ensure that the VCO will oscillate at a frequency equal to the serial data rate, and never at an integer multiple or fraction of the serial data rate. Those skilled in the art will be familiar with these circuits and methods.
A challenge in the design of a system of this type is the design of the VCO and minimizing both its self-generated phase noise and its power-supply-induced phase noise. The feedback nature of the closed-loop system can attenuate this phase noise, but only for phase noise frequencies below the system bandwidth, as set by the loop filter. At frequencies above the system bandwidth, VCO phase noise must be minimized. High-Q LC oscillators, high-power (though low-Q) ring-oscillators, and careful power supply filtering and regulating all can help minimize VCO phase noise but do not eliminate it.